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Au1500 Processor
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Product Selection Guide (PDF)

RMI Alchemy™ Solutions Au1500® Processor
Internet Edge Processor

A High-Performance/Low-Power MIPS® (SoC) with PCI Controller

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Overview

The RMI Alchemy™ Solutions Au1500® processor provides a high-performance, low-power System-on-a-Chip (SoC) for the Internet Edge device market. These devices include thin clients, Web servers, routers, printers, wired and wireless gateways, wireless access points, handheld computing, Web pads, set top boxes, and multimedia applications.


Product Description

The Au1500 processor delivers a complete SoC based on the MIPS32® instruction set. Designed for optimum performance at very low power, the Au1500 processor is available up to 500MHz. Power dissipation measures less than 0.7 watt for the 400MHz version. With highly-integrated features (on-chip memory controllers, a 66MHz PCI 2.2 controller, and Internet access peripherals), the Au1500 processor runs a variety of operating systems, including Windows® CE.NET, Linux, and VxWorks. Moreover, the integration of peripherals with RMI's unique, very high-performance, MIPS-compatible core can provide lower system costs, smaller form factors, lower system power requirements, simpler designs at multiple performance points, and shorter design cycles.

     
     
High-Speed MIPS® CPU Core
  • 333, 400 or 500MHz
  • MIPS32 Instruction Set
  • 32-Bit Architecture
  • 16KB Instruction and 16KB Data Caches
  • High-Speed Multiply-Accumulate (MAC) and Divide Unit
  • 1.5 -1.8V Core, 3.3V I/O

Highly-Integrated System Peripherals
  • 33/66MHz 32-bit PCI Controller (PCI 2.2 compliant)
  • GPIO (39 total, 22 dedicated for system use)
  • Two 10/100 Ethernet Controllers
  • USB Device and Host
  • Two UARTs
  • AC97 Controller
  • PCMCIA Interface Controller

High Bandwith Memory Buses
  • 100/125MHz SDRAM Controller
  • SRAM/Flash EPROM Controller
  Low System Power

Core MHz Power
333 <400mW
400 700mW
500 1.2W
  • Power-saving Modes
    • Idle
    • Sleep
  • Pseudo-static Design to 0Hz

Package
  • 424-pin PBGA
  • 19mm x 19mm

Operating System Support
  • Microsoft® Windows® CE.NET
  • Linux
  • VxWorks

Development Tool Support
  • MIPS32-compatible Tool Set
  • Numerous Third-Party Compilers, Assemblers and Debuggers
Processor Diagram    
     
     
     



     
     
     

Core Microarchitecture Highlights Pipeline

  • Scalar 5-stage Pipeline
  • Load/Store Adder in 1-stage
  • Scalar Branch Techniques Optimized
  • Pipelined Register File Access in Fetch Stage
  • Zero Penalty Branch
  • 16KB Non-Blocking Data Cache
  • 16KB Instruction Cache

Multiply-Accumulate (MAC) and Divide Unit
  • Max Issue Rate of one 32x16 MAC per Clock
  • Max Issues Rate of one 32x32 MAC per Every Other Clock
  • Operate in Parallel to CPU Pipeline
  • Executes all Integer Multiply and Divide Instructions
  • 32 x 16-Bit MAC Hardware

MMU
  • Instruction and Data Watch Registers for Software Breakpoints
  • Separate Interrupt Exception Vector
  • TLB
    • 32 Dual-entry Fully Associative
    • Variable Page Sizes 4KB -16MB
    • 4-entry ITB
 

PCI

  • PCI 2.2 Compliant Core
  • Configurable as Host or Satellite
  • 32 bit Address/Data Bus
  • 33MHz/66MHz Source or Sink Clock
  • PCI Boot Supported


EJTAG Support

  • Revision 2.5
  • Probes Availability from Major Vendors

Low Power Consumption

CoreMHz Core Voltage Power
333 1.5 <400mW
400 1.5 700mW
500 1.8 1.2W
     
     
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